Image DDP This page is still under construction.

It is intended to hold corrections and additional information on the topics in the DDP book.
Errors found in the book and suggestions for clarifications and additional materials to be published through this site should be reported via e-mail to mayer-lindenberg@tu-harburg.de.

Files that can be downloaded from the links below are the VHDL source of the CPU2 discussed in the book, the VHDL source of a sample system built around this CPU, and a PDF document containing release notes on these. The latter also define the conditions of usage of the design. The files may still contain some errors, and there is no guarantee of any kind on their correct functioning in every respect. Further information, updated versions, and programming tools for the CPU2, and more on the π-Nets programming environment will be made available via this site.

A short guide to π-Nets is included for downloading.

Additional Literature related to DDP:

[1]
F. Vahid, T. Givargis, Embedded System Design, Wiley 2002
[2]
M. Fleury, A. Downton, Pipelined Processor Farms, Wiley 2001
[3]
Tummala, Fundamentals of Microsystem Packaging, McGraw-Hill
[4]
Infineon, Semiconductors, 2nd ed., Publicis 2004


Cpu.vhd CPU definition file
Sys_ve_0.vhd CPU system for testing/reference
Rn_cpu2.pdf Release notes on the CPU design
Sgpn.pdf Short guide to π-Nets



just@tu-harburg.de